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[Otherfft1024ref_v1_0

Description: 用vhdl实现的FFT自电子工程论坛-Achieved using VHDL FFT from electronic engineering Forum
Platform: | Size: 581632 | Author: zjy | Hits:

[Linux-Unixce05c90f-ada5-4e20-9e6d-80c9b5d8b53c

Description: 用vhdl实现的FFT1024点-Achieved using VHDL FFT1024 point
Platform: | Size: 358400 | Author: zjy | Hits:

[VHDL-FPGA-Verilogsynth_fft

Description: fft原代码,用vhdl语言完成快速傅立叶变换-fft the original code, complete with VHDL language Fast Fourier Transform
Platform: | Size: 421888 | Author: | Hits:

[source in ebookfftcode

Description: VHDL 的FFT 1024点源码。既有VHDL 的,也有Verlog的。比较好用。占用资源少-VHDL source code of the FFT 1024 points. Both VHDL and there are also some of the Verlog. Comparison of ease of use. Occupy less resources
Platform: | Size: 37888 | Author: 张加良 | Hits:

[VHDL-FPGA-VerilogFFT_VHDL

Description: FFT的VHDL源文件,经过在Quartus II上的测试无错误-FFT of the VHDL source file, after the Quartus II on the test error
Platform: | Size: 28672 | Author: 沈克镇 | Hits:

[VHDL-FPGA-Verilogcfft

Description: CFFT是一个数据宽度和点数都可配置的基4 FFT core,用VHDL实现-CFFT is a data width and the base points can be configured 4 FFT core, using VHDL realize
Platform: | Size: 168960 | Author: | Hits:

[Algorithm20070112201648396

Description: FFT参考设计和一篇用VHDL实现快速傅立叶变换的论文,包括原理分析和代码实现,印度圣雄甘地大学M.A.学院提供 -FFT reference design using VHDL and realize a fast Fourier transform of the thesis, including the principles of analysis and code realize, India Mahatma Gandhi University College, MA
Platform: | Size: 93184 | Author: 吴庆庆 | Hits:

[OtherVHDL_core_for_1024-point_radix-4_FFT_computation.r

Description: 该论文阐述了用于硬件信号处理的基于4基数12点快速傅立叶变换的VHDL核的设计过程。作者:Vite-Frias Jose Alberto、Romero-Troncoso Rene de Jesus、Ordaz-Moreno -The paper described the hardware for signal processing based on the 4 base 12 points Fast Fourier Transform Nuclear VHDL design process. Authors: Vite-Frias Jose Alberto, Romero-Troncoso Rene de Jesus, Ordaz-Moreno
Platform: | Size: 440320 | Author: Rae | Hits:

[VHDL-FPGA-Verilogvhdl_fft

Description: 一个用vhdl语言(硬件描述语言)编写的fft实现程序。fft用途很广,该程序可以在cpld或fpga等硬件上实现,软件坏境为maxplus10.0及以上或quartus2。-A use of VHDL language (Hardware Description Language), prepared by the procedure fft realize. fft uses a very wide, the program can CPLD or FPGA hardware to achieve, software environments for maxplus10.0 and above or quartus2.
Platform: | Size: 30720 | Author: 楚琳 | Hits:

[VHDL-FPGA-VerilogFFT_report

Description: Design Simulation and synthesis of a fft processor using VHDL
Platform: | Size: 362496 | Author: lys | Hits:

[VHDL-FPGA-VerilogcoreFFT_AR_3_0

Description: FFT算法VHDL生成器(Actel公司提供)-FFT algorithm for VHDL Generator (Actel offers)
Platform: | Size: 1406976 | Author: zhan | Hits:

[Software Engineeringsynth_fft

Description: 可综合FFT的VHDL实现 已经过测试-FFT can be integrated to achieve the VHDL has been tested
Platform: | Size: 527360 | Author: 叶茂 | Hits:

[VHDL-FPGA-Verilog1024FFT

Description: 1024点FFT快速傅立叶变换 VHDL语言实现-1024-point FFT Fast Fourier Transform VHDL language
Platform: | Size: 436224 | Author: libukun | Hits:

[VHDL-FPGA-Verilogfpgafft

Description: 用fpga实现dsp 的fft算法 其中有几个文档文件和用vhdl写的1024点的fft代码-FPGA dsp realize using the fft algorithm which has a number of document files and the use of VHDL to write the 1024 point fft code
Platform: | Size: 533504 | Author: 阿斯顿 | Hits:

[VHDL-FPGA-Verilogfft_test

Description: 用vhdl编写的FFT的代码,很全,很强大.-FFT prepared using VHDL code, it is wide, it is powerful.
Platform: | Size: 912384 | Author: fangyingjie | Hits:

[VHDL-FPGA-Verilogfft

Description: fft源代码,希望对大家有用,谢谢 fft源代码,希望对大家有用,-fft source code, in the hope that useful to everybody, thank you fft source code, in the hope that useful to everybody,
Platform: | Size: 1024 | Author: 111 | Hits:

[VHDL-FPGA-Verilogfft_32k

Description: FFT 32k use VHDL MATLAB
Platform: | Size: 985088 | Author: | Hits:

[VHDL-FPGA-Verilogasdd

Description: 论文基于FPGA的高速实时FFT处理器设计,给出了详细的设计流程!-Thesis of high-speed FPGA-based real-time FFT processor design, detailed design gives the flow!
Platform: | Size: 157696 | Author: 邓振淼 | Hits:

[VHDL-FPGA-Verilogfft_statemachine

Description: FFT程序,此程序虽然耗逻辑资源很大,但是在接受数据后的第7个时钟沿就可以输出FFT变换后的数据,对要求时延较低的系统可以考虑-FFT procedure, this procedure should not consume a lot of logic resources, but the data in the first seven clock can be output along the FFT transformed data, the requirements of time-delay system can be considered lower
Platform: | Size: 7168 | Author: xiaoyuer | Hits:

[MPIbutterfly

Description: 附件代码实现了基4FFT的碟形单元运算,是FFT算法的核心部分,并且此碟形单元运算是基于浮点运算的-Annex code base of the dish 4FFT computing unit is the core of the FFT algorithm, and this dish is based on the computing unit of the floating-point operations
Platform: | Size: 4096 | Author: 钟毓秀 | Hits:
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